Integrated circuits have progressed to advanced technologies with smaller feature sizes, such as 32 nm, 28 nm and 20 nm. In these advanced technologies, new structure or new material may be implemented. In one example, field-effect transistors (FETs) include three dimensional transistors each having a fin-like FET (FinFET) structure for enhanced device performance. In another example, different semiconductor material (such as silicon germanium) is incorporated for device enhancements, such as strain effect to increase the carrier mobility. In another example, the gate stacks in the FETs include metal for metal electrodes and high-k dielectric material for gate dielectric. However, existing methods and structures have various concerns and disadvantages associated with device performance and reliability. For example, substrate surface damages are introduced during integrated fabrication. The substrate surface damage may further induce high leakage and degraded device performance.
Therefore, there is a need for a structure and method for an integrated circuit to address these concerns for enhanced performance.